#2.1 H# 1

#3.1 Instructions Set Architecture -1 #3.2 Instructions Set Architecture -2 #3.3 Instructions Set Architecture -3 #3.4 Instructions Set Architecture -4

#4.1 mid1 - Number of Addresses #4.2 نموذج اختبار ميد1 #4.3 mid2- تمرين stack #4.4 mid2-تمرين micro-operations #4.5 mid1 #4.6 mid1 #4.7 ميد2 #4.8 mid2 #4.9 mid 2 #4.10 تمرين mid1 #4.11 mid1 -Quiz #4.12 mid1 - instruction word -Quiz #4.13 mid1 -descriptions of the instructions-ex #4.14 mid1 -executing instructions-ex #4.15 mid1 -CPU time-ex #4.16 mid1 -computers faster-ex #4.17 mid1 - average CPI -ex #4.18 mid1 - average CPI -ex #4.19 mid1 -clock rate -ex #4.20 mid1 -fetch and execute-ex #4.21 mid2-AND-OR-XOR #4.22 mid2-shift-ex #4.23 mid1 - Number of Addresses #4.24 mid1 - Number of Addresses #4.25 mid2 - X86 data format #4.26 Code -mid2 #4.27 Match -تعريفات-mid2 #4.28 mid1 - CPU time-ex #4.29 Direct Memory #4.30 four-way set-associative #4.31 direct-mapped cache-ex #4.32 32 way set associative cache-ex #4.33 fully associative cache. #4.34 direct mapped #4.35 أختياري -mid2 #4.36 direct mapped cache- #4.37 أختياري-1 mid #4.38 أختياري فاينل -1 #4.39 أختياري فاينل-2 #4.40 Cachline nr-مهم #4.41 Match-فاينل #4.42 أختياري فاينل-3 #4.43 Design memory-final #4.44 direct mapped cache-final #4.45 mid1 -memory content #4.46 fetch and execute-mid1 #4.47 أختياري -mid1 #4.48 أختياري-1 mid #4.49 mid1- opertion code #4.50 أختياري-فراغات mid1 #4.51 -mid2 - Quiz2-code #4.52 mid2-Access time

#5.1 Fetch #5.2 Rules for Clock Cycle Grouping #5.3 Control of the processor #5.4 Control Signals - output #5.5 Internal Organization #5.6 Timing Diagram for Intel 8085 OUT Instruction

#6.1 Characteristics of memory systems #6.2 Access Methods #6.3 Mapping Function #6.4 Internal Memory #6.5 تمارين-1 #6.6 تمارين-2

#7.1 Input-Output #7.2 I-O Commands #7.3 Interrupt Driven I-O #7.4 Direct Memory Access (DMA)

#8.1 Magnetic Disk-Hard Disk #8.2 Magnetic Disk- Hard Disk A sector Format #8.3 RAID #8.4 RAID Comparison #8.5 Optical Disk (CD & DVD) #8.6 Dual layer DVD ROM